Happy New Mainframe Day! Introducing the zBC12 (Post #1)

We saw some clues that IBM was getting ready to announce a new mainframe today, and here it is: the new zEnterprise BC12. There are a lot of IBM announcements related to the new zBC12, and I'm sifting through all the information. Here are some of the highlights as I see them. I'll provide further updates as I read all the materials IBM has released.

  • First, the hardware itself: processor clock speed increased to 4.2 GHz, core count increased, and both total capacity and per-core capacity up more than I would have expected. A single zBC12 can provide almost 5,000 PCIs for z/OS, z/VSE, and/or z/TPF with its maximum 6 CPs. That still leaves another 7 engines for any mix of specialty cores (zIIPs, IFLs, etc.) Uniprocessor performance is above 1,000 PCIs. Also, the maximum memory is now up to 496 GB of usable RAIM-protected memory, which is another very nice bump. This new zBC12 can soak up a large amount of workload.
  • There's a new "LPAR absolute hardware capacity" setting on the zBC12 which presumably also will now be available on the zEC12. This setting will be mainly of interest to Linux on zEnterprise customers who want to set particular IFL capacity limits mostly for software licensing purposes.
  • IBM is introducing exploitation of 2 GB memory page support in the zBC12 and zEC12 starting with Java 7 for z/OS, to improve Java performance and capacity yet again.
  • There's a new high speed memory-to-memory adapter ("10GbE RoCE Express") which provides something analogous to HiperSocket connections but now between machines, to speed up data transmission and reduce networking overhead. This new adapter is available for both the zBC12 and zEC12.
  • There's another new adapter for both models called the zEDC Express which accelerates data compression.
  • I always wondered why IBM had 101 customer configurable cores on the zEnterprise EC12 machine. It's an odd number, and that's unusual for mainframes. Now we know: IBM reserved one core for a new Internal Firmware Processor (IFP) which is invisible. But this IFP, also included as a standard feature on the zBC12, supports the new RoCE Express and zEDC Express functions. I expect IBM will use this "hidden" processor for progressively more supporting functions, much like how SAPs provide various accounting and support services for I/O. We'll never really deal with the IFP and its control programs, but they'll be there, supporting particular new functions.

Much more information and analysis will follow. Stay tuned.

by Timothy Sipples July 23, 2013 in Innovation, Systems Technology


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